This is an NAND gate implemented using transistor-transistor logic. Click on the inputs on the left to toggle their state. When all of the inputs are high, the output is low; otherwise, the output is high.

When both inputs are high, the two transistors on the left are in reverse active state. A current flows through the 4.7k resistor through the base and collector of these transistors, and then through the base of the transistor on the right, saturating it and bringing the output down near ground.

When both inputs are low, the easiest path to ground through the 4.7k resistor is through the base of the transistors on the left to the inputs. This brings their collector voltages low enough so that very little current can flow through the base of the transistor on the right. This keeps that transistor off, bringing the output up to 5 V.

When only one of the inputs is low, that input provides the easiest path to ground, through its corresponding transistor. This keeps the transistor on the right switched off.

Next: TTL NOR

Previous: DTL NAND

Index

Simulator Home



java@falstad.com
Generated Fri Dec 6 2024